OPEN HOUSE
Tuesday, November 15th from 4:00pm - 7:00pm
Location: Dell Force10 Headquarters, 350 Holger Way, San Jose, CA 95134

We’re looking to fill our most critical needs in the following areas:

• NETWORK ENGINEERS
• HARDWARE DESIGN ENGINEERS
• SOFTWARE ENGINEERS
• SYSTEMS SALES ENGINEERS
• PRODUCT MARKETING MANAGERS
• TECHNICAL ACCOUNT MANAGERS

Interested? Register for our open house at
http://dellnetworkingjobs.com/openhouse

Dell is an AA/EO employer.
 

1. Job Title: CPU Logic Design and Verification Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1881526

2. Job Title: Senior CPU Physical Design Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1882515

3. Job Title: Senior CPU Circuit Design Engineer (G1881529)
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1881529

4. Job Title: Design Verification Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1883515

5. Job Title: Senior Processor Architect
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1884940

6. Job Title: CPU Performance Modeling Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1882627

7. Job Title: Senior Design for Test Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1882516

8. Job Title: Embedded Software Engineer
Link to: https://jobs.qualcomm.com/public/jobDetails.xhtml?requisitionId=1884845
 

Current Openings Include:

• Software Engineers (Java/UI/Backend, GUI, VM Platforms and Device Driver Development)
• Firmware/BIOS/UEFI Engineers and Kernel Development Engineers
• Manufacturing, Hardware, Mechanical and Environmental Test Engineers
• Engineering Program Managers
• Software QA Test, Test Automation, Sr. SW QA Engineers (ESX and AIX/Interoperability)
• HDD Qualification Engineer and VLSI Development and Test

Core Skill sets that we seek include:

• OS (Operating System Experience): Linux, Unix, Windows
• Programming experience in: Low Level “C”, Multi-threaded, Java Backend
• Scripting experience in: Bourne, Shell, Perl, Tcl, ksh, bsh etc.
• Relational Database experience in: Oracle or MySQL
• Device Drivers, SCSI protocol, Fibre Channel protocol, distributed architectures
• Linux Kernel Internals and Kernel Development
• BIOS standards in UEFI
• Testing Experience in: VMware ESX, Citrix XenServer, Microsoft Hyper-V.
• Knowledge in Storage Area Networks preferred but not a must.

What are you ready to do?
Email your resume to storagejobs@hp.com and apply at
www.hp.com/go/jobs.
Search for numbers: 563842, 574136, 546247
and/or 574143 and over 70 others.

Patent Attorney
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Generalists, Director
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Product, Project - R&D
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Analysts, Controller, Accounts Payable
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Manufacturing Engineering, Planners, Commodity Specialist, Planning Manager, Global Sales
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Specialist, Managers, Directors
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

Immunology, Formulations, Peptide, Organic, Research and Development
All of our positions are within the life science/biotechnology area which consists of entry to senior level positions (including project management).

To view details and apply online :

1. go to http://www.citrix.com/careers
2. Click on Citrix Jobs - NA
3. Enter Job Req# for details.
4. When you apply online at citrix.com/careers please indicate (by writing in) your source as Virtual Career Fair July 28th.

For more info text CITRIXJOBS to 22345 on your mobile phone

Req # | Title | Location | Functional Area

7949 | Controller I | US- CA, Santa Clara | Finance

8568 | Prin Financial Anly | US- FL, Ft. Lauderdale | Finance

8069 | Dir Budgeting & Finance I | US- FL, Ft. Lauderdale | Finance

8162 | Controller II | US- FL, Ft. Lauderdale | Finance

8210 | Mgr Finance III | US- FL, Ft. Lauderdale | Finance

8394 | Prin Financial Anly | US- FL, Ft. Lauderdale | Finance

8405 | Mgr Finance III | US- FL, Ft. Lauderdale | Finance

8427 | Dir Accounting I | US- FL, Ft. Lauderdale | Finance

8759 | Tax Spec | US- FL, Ft. Lauderdale | Finance

7780 | Director Marketing | US- FL, Ft. Lauderdale | Marketing

7837 | Dir Online Marketing | US- FL, Ft. Lauderdale | Marketing

7848 | Online Media Buyer II | US- FL, Ft. Lauderdale | Marketing

7851 | Dir Online Marketing | US- FL, Ft. Lauderdale | Marketing

7893 | Sr Technical Mktg Spec | US- FL, Ft. Lauderdale | Marketing

7894 | Online Media Buyer II | US- FL, Ft. Lauderdale | Marketing

7896 | Sr Technical Mktg Spec | US- FL, Ft. Lauderdale | Marketing

8468 | Sr Marketing Spec | US- FL, Ft. Lauderdale | Marketing

8447 | Assoc Product Marketing Mgr | US- MA, Bedford | Marketing

7814 | Dir 2 Products | US- CA, Santa Clara | Product Design

7847 | Editor V | US- CA, Santa Clara | Product Design

8147 | User Interface Design Engr 5 | US- CA, Santa Clara | Product Design

8148 | User Interface Design Engr 5 | US- CA, Santa Clara | Product Design

8149 | User Interface Design Engr 5 | US- CA, Santa Clara | Product Design

7452 | Business Development Dir I | US- CA, Santa Clara | Product Development/Engineering

7778 | Sr Software Development Engr 2 | US- CA, Santa Clara | Product Development/Engineering

7812 | Sr Software Development Engr 2 | US- CA, Santa Clara | Product Development/Engineering

7819 | Sr Software Test Engr 2 | US- CA, Santa Clara | Product Development/Engineering

7961 | Sr Software Test Engr 2 | US- CA, Santa Clara | Product Development/Engineering

8049 | Prin Software Test Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8138 | Sr Software Development Engr 2 | US- CA, Santa Clara | Product Development/Engineering

8184 | Lead Software Test Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8583 | Lead Software Test Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8584 | Lead Software Test Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8638 | Sr Software Development Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8715 | Sr Software Development Engr 2 | US- CA, Santa Clara | Product Development/Engineering

8745 | Sr Software Test Engr 1 | US- CA, Santa Clara | Product Development/Engineering

8775 | Sr Architect | US- CA, Santa Clara | Product Development/Engineering

7943 | Sr Software Development Engr 2 | US- CA, Santa Clara | Product Development/Engineering

7353 | Lead Software Test Engr 1 | US- FL, Ft. Lauderdale | Product Development/Engineering

7792 | Sr Software Test Engr 1 | US- FL, Ft. Lauderdale | Product Development/Engineering

8705 | Lead Software Development Engr I | US- FL, Ft. Lauderdale | Product Development/Engineering

7726 | Sr Software Test Engr 2 | US- FL, Ft. Lauderdale | Product Development/Engineering

7515 | Lead Software Test Engr 1 | US- FL, Ft. Lauderdale | Product Development/Engineering

8308 | Sr Software Development Engr 1 | US- FL, Ft. Lauderdale | Product Development/Engineering

8420 | SW Test Eng 1 | US- FL, Ft. Lauderdale | Product Development/Engineering 8357 | Lead Software Development Engr I | US- MA, Bedford | Product Development/Engineering

8359 | Sr Software Development Engr 1 | US- MA, Bedford | Product Development/Engineering

8360 | Lead Software Test Engr 1 | US- MA, Bedford | Product Development/Engineering

8507 | Lead Systems Engr | US- MA, Bedford | Product Development/Engineering 8370 | Principal SW Dev Eng 1 | US- WA, Redmond | Product Development/Engineering

8453 | Sr Software Test Engr 1 | US- WA, Redmond | Product Development/Engineering

8441 | Prin Product Mgr 1 | US- CA, Santa Clara | Product Development/Engineering 8431 | Sr Product Mgr 2 | US- FL, Ft. Lauderdale | Product Development/Engineering 8070 | Dir Product Marketing | US- CA, Santa Clara | Product Development/Engineering

8310 | Prin Product Marketing Mgr | US- CA, Santa Clara | Product Development/Engineering

8598 | Sr Product Marketing Mgr | US- CA, Santa Clara | Product Development/Engineering

8792 | Lead Product Marketing Mgr | US- CA, Santa Clara | Product Development/Engineering

8438 | Lead Product Marketing Mgr | US- FL, Ft. Lauderdale | Product Development/Engineering

7807 | Consultant | Canada, Toronto | Sales & Services

8561 | Prin Consultant | Canada, Toronto | Sales & Services

8569 | Consulting Services Mgr | Canada, Toronto | Sales & Services

8099 | Territory Sales Mgr | Canada, Toronto | Sales & Services

8616 | Territory Sales Mgr | Canada, Toronto | Sales & Services

8630 | Sr Account Mgr | Canada, Toronto | Sales & Services

8698 | Sr Partner Relationship Mgr | Canada, Toronto | Sales & Services

7867 | Business Development Dir I | Remote | Sales & Services

8058 | Sr Systems Engr | Remote | Sales & Services

8708 | Sr Strategic Alliance Mgr | Remote | Sales & Services

8631 | Sr Account Mgr | Remote | Sales & Services

8687 | Prin Field Sales Mgr Reseller | Remote | Sales & Services

8827 | Channel Development Mgr | Remote | Sales & Services

8817 | Lead Systems Engr | US- AZ, Phoenix | Sales & Services

7900 | Sr Systems Engr | US- CA, Los Angeles | Sales & Services

8559 | Prin Consultant | US- CA, Santa Clara | Sales & Services

8192 | Sr Mgr Human Resources | US- CA, Santa Clara | Sales & Services

8674 | Lead HR Generalist | US- CA, Santa Clara | Sales & Services

8688 | Systems Engr | US- CA, Santa Clara | Sales & Services

8221 | Lead Courseware Spec | US- CA, Santa Clara | Sales & Services

8225 | Technical Course Developer | US- CA, Santa Clara | Sales & Services

8686 | Systems Engr | US- CO, Denver | Sales & Services

8593 | Consultant | US- FL, Ft. Lauderdale | Sales & Services

8594 | Architect | US- FL, Ft. Lauderdale | Sales & Services

8595 | Architect | US- FL, Ft. Lauderdale | Sales & Services

8613 | Architect | US- FL, Ft. Lauderdale | Sales & Services

8614 | Architect | US- FL, Ft. Lauderdale | Sales & Services

8615 | Consultant | US- FL, Ft. Lauderdale | Sales & Services

8787 | Architect | US- FL, Ft. Lauderdale | Sales & Services

8259 | Mgr Sales Operations II | US- FL, Ft. Lauderdale | Sales & Services

8363 | Business Anly | US- FL, Ft. Lauderdale | Sales & Services

8467 | Mgr Customer Care 1 | US- FL, Ft. Lauderdale | Sales & Services

8539 | Sr Channel Marketing Spec | US- FL, Ft. Lauderdale | Sales & Services

8540 | Lead Marketing Spec | US- FL, Ft. Lauderdale | Sales & Services

8608 | Mgr Channel Marketing I | US- FL, Ft. Lauderdale | Sales & Services

8628 | Lead Project Mgr (non Product Dev) | US- FL, Ft. Lauderdale | Sales & Services 8707 | Proj_Prog (Design) Mgmt 5 | US- FL, Ft. Lauderdale | Sales & Services

8710 | Sales Commission Analyst 5 | US- FL, Ft. Lauderdale | Sales & Services

8811 | Customer Care Account Spec | US- FL, Ft. Lauderdale | Sales & Services

8219 | Lead Courseware Spec | US- FL, Ft. Lauderdale | Sales & Services

8222 | Courseware Development Lead | US- FL, Ft. Lauderdale | Sales & Services 8223 | Lead Program Mgr 2 | US- FL, Ft. Lauderdale | Sales & Services

7940 | Sr Web Spec | US- FL, Ft. Lauderdale | Sales & Services

8311 | Sr Technical Lead | US- FL, Ft. Lauderdale | Sales & Services

7549 | Sr Systems Engr | US- GA, Alpharetta | Sales & Services

7960 | Chief Field Sales Mgr Reseller | US- GA, Alpharetta | Sales & Services

7563 | Tech Support Engr | US- GA, Alpharetta | Sales & Services

7576 | Escalation Engr | US- GA, Alpharetta | Sales & Services

8414 | Software (Application) Engnr III | US- GA, Alpharetta | Sales & Services

8582 | Tech Support Engr | US- GA, Alpharetta | Sales & Services

8773 | Sr Escalation Engr | US- GA, Alpharetta | Sales & Services

8557 | Prin Consultant | US- IL, Chicago | Sales & Services

8562 | Consulting Services Mgr | US- IL, Chicago | Sales & Services

8415 | Sr Channel Marketing Spec | US- IL, Chicago | Sales & Services

8755 | Sr Field Sales Mgr Reseller | US- MA, Bedford | Sales & Services

8573 | Sr Consultant | US- MD, Bethesda | Sales & Services

8003 | Lead Systems Engr | US- MD, Bethesda | Sales & Services

8396 | Lead Systems Engr | US- MD, Bethesda | Sales & Services

8563 | Lead Systems Engr | US- MD, Bethesda | Sales & Services

8808 | Prin Account Mgr | US- MD, Bethesda | Sales & Services

8809 | Prin Account Mgr | US- MD, Bethesda | Sales & Services

8810 | Sr Account Mgr | US- MD, Bethesda | Sales & Services

8798 | Dir Sales I | US- MD, Bethesda | Sales & Services

8555 | Consultant | US- NY, New York City | Sales & Services

8556 | Sr Consultant | US- NY, New York City | Sales & Services

8558 | Prin Consultant | US- NY, New York City | Sales & Services

8578 | Consulting Services Mgr | US- NY, New York City | Sales & Services

8766 | Prin Field Sales Mgr Reseller | US- NY, New York City | Sales & Services

8506 | Lead Systems Engr | US- NY, New York City | Sales & Services

8801 | Assoc Territory Sales Mgr | US- TX, Dallas | Sales & Services

8030 | Mgr Logistics III | US- CA, Santa Clara | WW Operations/IT

8333 | Process Sustaining Engineer 5 | US- CA, Santa Clara | WW Operations/IT

7959 | Facilities Maintenance Admin 3 | US- FL, Ft. Lauderdale | WW Operations/IT 8393 | Sr Web Developer | US- FL, Ft. Lauderdale | WW Operations/IT

8278 | Sr Mgr Information Technology | US- FL, Ft. Lauderdale | WW Operations/IT 8449 | Lead Telecom Engr | US- FL, Ft. Lauderdale | WW Operations/IT

8450 | Sr Information Security Anly | US- FL, Ft. Lauderdale | WW Operations/IT

8476 | Sr Systems Programme | US- FL, Ft. Lauderdale | WW Operations/IT

8692 | Lead Telecom Engr | US- FL, Ft. Lauderdale | WW Operations/IT

8796 | Sr Programmer Anly | US- FL, Ft. Lauderdale | WW Operations/IT
 

Innovators. Problem Solvers. Difference Makers.
We’re looking to hire many exceptional engineers.

ADI engineers have a recognized record of technology breakthroughs that help solve many of the world’s toughest design challenges. If you’re inspired to make a difference for a better tomorrow, we offer a range of opportunities to use your engineering skills and creative talent to achieve truly signifi cant results.

text ANALOG to 424242 for more information.

www.analog.com/careers

MAKE A DIFFERENCE

ANALOG DEVICES
 

Graphics Technician
Final Filing Date: September 23, 2011
Monthly Salary: $5,804 – $7,026 plus excellent benefits

The Graphics Technician performs a variety of advanced graphic art renderings, layout designs, and creates professional quality artwork and design for both printed and digital media. The Graphics Technician designs a wide variety of publications and materials for internal communications as well as communications with customers and the community.

The Ideal Candidate
Should possess advanced level skills in Adobe Creative Suite software in a Mac environment including: InDesign, Illustrator, and Photoshop. Intermediate to advanced level skills in the Microsoft Office Suite including Word, and Excel. Moderate to intermediate level skill in programs such as: Quark, Adobe Freehand, and Corel Painter. Knowledge of web design and layout as well as computer animation techniques and possession of a Bachelor’s degree are highly desirable.

Requirements
Equivalent to completion of an Associate of Arts degree in Graphic Arts or a closely related field and three years of experience in professional graphic design. Possession of a valid California Driver’s License.

Apply online at www.centralsan.org

An Equal Opportunity Employer Encouraging Workforce Diversity
 

• Deliver transistor-level design for voltage regulators and high precision analog circuits
• Thorough Pre Silicon validation to ensure quality design; including Power, Reliability, Aging, etc.
• Be responsible for Mask Design supervision ensuring optimized layout
• Provide Post Silicon validation / debug support to ensure silicon quality

• BS in EE, CE or CS with 4+ years of experience
• Experience with Analog IC design experience encompassing circuit design, circuit simulation, and physical layout .
• Experience with Analog blocks such as ADC, DAC, filters, Power Amplifier, Temperature Sensor, Voltage Regulator, Bandgap, or Operational Amplifier

• MS in EE, CE or CS with 2+ years experience is preferred
• Experience with Switching Power regulators will be a plus
• Experience in mixed-signal verification will be a plus

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

In this position, your responsibilities will include but not be limited to:

• Ensuring the logical design of the processor satisfies the architectural specification
• Participating in microprocessor verification
• Performing hardware modeling and simulation, random and focused stimulus generation and coverage analysis
• Developing or using checking software to compare model behavior against a specification
• Demonstrate excellent communication and teamwork skills

Qualifications

Minimum Qualification:

• BS degree in Electrical/Computer Engineering or Computer Science, with at least 2 years of industry experience
• Strong programming skills in C++ and Perl
• Experience with Verilog simulation
• Academic course work or work experience processor architecture and micro-architecture

Preferred:

• MS degree in Electrical/Computer Engineering or Computer Science, with at least 2 years of industry experience
• Strong programming assembly skills
• System debug skills
• Understanding of software and/or hardware validation techniques
• Solid understanding of system and processor architecture, and the interaction of computer hardware with software
• Solid background in software development, for developing tools and test cases
• Understanding of simulation techniques and hardware modeling
• Good understanding of logic design techniques
• Hardware and software debug skills
• Familiarity with software engineering practices 

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

As a member of the Front end design team in Intel's Server CPU Development Group (SDG) team , the candidate will work on micro-architecture and development of DFX features of Server CPUs. These server CPUs fit in several market segments ranging from En to EX. Behavioral traits for this position include excellent communication skills, collaborative teamwork, leadership, results orientation and the ability to work effectively across multiple project teams. Candidates would work in a very team-oriented environment and would have to interact with engineers from other design disciplines.

Responsibilities include:

• Deep understanding of CPU architecture and micro-architecture
• DFX requirement evaluation including features, area, power and effort
• Development and maintenance of detailed DFX micro-architecture specifications and DFX user specifications
• Architectural leadership during RTL development and validation, with hands-on participation in RTL development
• Post-silicon DFX support

Qualifications

Minimum Qualifications:

• BS or MS in EE, CE or CS with 4+ years or 2+years experience respectively
• Experience in advanced DFT architecture and micro-architecture design concepts

Preferred:

• Experience with SCAN, TAP, Micro-breakpoint, Burn-in modes and HVM modes is strongly desired
• Experience with pre-si validation environment

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

As a member of the Front end design team in Intel's Server CPU Development Group (SDG) team , the candidate would be responsible for defining and designing portions of highly integrated IO sub-system. Designs typically target high frequencies and good tightly coupled interface to the backbone of the system in a power-constrained, schedule-driven and product cost-conscious environment. The candidate's responsibilities would lie in a processor's PCIE controller phy, link and transaction layer and would included proposing innovative solutions to micro-architecture design challenges, cooperating with circuit designers to complete physical feasibility studies, authoring micro-architecture design specifications, developing high-level or register-transfer-level (RTL) modeling methodology, coding high-level or RTL models, authoring validation plans, applying best known methods, contributing to functional and performance validation, supporting physical design (e.g. to meet timing goals), participating in silicon debug and possibly leading a small team of engineers through any of the above. Candidates would work in a very team-oriented environment and would have to interact with engineers from other design disciplines.

Qualifications

Minimum Qualifications:

• BS or MS in EE, CE or CS with 4+ years or 2+ years experience respectively
• Experience in advanced computer architecture and micro-architecture design concepts
• Experience in Processor Design

Preferred:

• Software development skills as well as a working knowledge of physical design (e.g. typical implementation styles, wire delay constraints) are advantageous.

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

In this position, you will be a member of the pre-silicon validation team in Intel's Server CPU Development Group. You will be responsible for validating CPU design functionality in Intel Xeon processors for high-end, server-oriented computing applications.

Your responsibilities will include but not be limited to:

• Mixed signal validation of high speed I/O circuits such as Phy for IIO, QPI and DDR/VMSE, validating reset sequence for the chip .
• Defining and developing test plans, reviewing test plans across digital/analog boundary, developing tests and validation infrastructure such as checkers, running tests and regressions using AMS tools such as Cadence-AMS or mynx generating eVCD files as stimulus. He/she will be expected to work in and extend Test environments coded in Specman and other languages such as C++.
• Developing new tools and methods to support efficient and reliable infrastructure for validation This includes computing, regression and test failure debug management.
• Contributing to the organization's longer-term technical vision by identifying and driving technologies that offer shorter validation cycles, higher quality silicon and significant productivity gains
• Working collaboratively in a team-oriented environment, interacting with engineers from other design and validation disciplines

Qualifications

Minimum Qualifications:

• Master of Science degree in Electrical Engineering and/or Computer Engineering and/or Computer Science with 4 years of related experience
• Strong understanding of computer architecture and micro-architecture design concepts
• Mixed signal validation experience for high-speed circuits
• Good understanding and interest in working on analog/digital boundary and understanding of analog design
• Experience working with simulators such as Mynx, cadence-AMS or nanosim
• Experience in developing checkers, monitors, test generators
• Experience in using modeling languages Specman, System Verilog

Preferred:

• Expertise in Scripting languages (Perl, Shell)

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

In this position, you will be a member of the pre-silicon validation team in Intel's Server CPU Development Group (SDG). You will be responsible for validating design functionality in Intel� Xeon� Processors for high-end, server-oriented computing applications.

Your responsibilities will include but not be limited to:

• Validation of server features in cluster test environment is required
• Validating designs at block or full-chip level by authoring validation plans, writing focus tests, creating templates defining coverage strategies, developing and analyzing coverage monitors, creating event injectors, writing architectural and micro-architectural correctness checkers, developing BFMs (Bus Functional Model), running functional simulations, and debugging failures to root cause
• Maintaining and enhancing the validation infrastructure by creating new tools to support validation
• Contributing to the organization's longer-term technical vision by identifying and driving technologies that offer shorter validation cycles, higher quality silicon (no bug escapes) or methodologies that provide significant productivity gains
• Working in a very team-oriented environment and interacting with engineers from other design disciplines

Qualifications

Minimum Qualifications:

• BS or MS EE, CE or CS with 4+ years or 2+ years experience respectively
• Strong understanding of CPU architecture is must, computer architecture and micro-architecture design concepts
• Programming experience with high level programming languages (example C, C++)
• Scripting languages (example Perl, shell*, PHP*)
• Hardware description languages (Verilog*)
• Experience with microarchitecture verification

Preferred:

• Knowledge of specman*

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

As a member of the design team in Intel's Server CPU Development Group (SDG) team , the candidate would be responsible for RTL and verification flow development and support. The responsibilities of this position include, but are not limited to, support and development of RTL simulation and front end design and verification tools and flows, particularly system verilog and lint tools. The successful candidate has hands-on design and simulation experience in RTL or gate level design and verification, and demonstrated capabilities in debugging tool and flow issues. The position will require close collaboration with RTL design and verification staff, as well as members of the DA team. In this leadership position, candidate will monitor simulation performance, profile compute resource usage and interface with vendors.

Qualifications

Minimum Qualifications:

• BS or MS in EE, CS or CE with 4+ years or 2+ years experience respectively
• Experience in simulation tools and environments
• Experience in gate level simulation and verification
• Programming experience in C shell, PERL or UNIX
• Experience System Verilog

Preferred:

• Prior experience writing RTL code in System Verilog, or experience with Synopsys VCS, Verdi, Bitkeeper, RTL and CTE Model build flows, gateKeeper flows, partitioner, Chef, Lintra rules is highly desirable.
• Experience with formal verification tools and flows would also be valuable

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

Intel Security Center of Excellence is looking for an experienced, well-qualified engineering manager to manage a talented team of security engineers focused on delivering robust security assurance for upcoming major Intel product families.

Responsibilities:

• Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost.
• Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions.
• Provides guidance on employee development, performance, and productivity issues.
• Plans and schedules daily tasks'' uses judgment on a variety of problems requiring deviation from standard practices. Inadequacies and erroneous decisions would cause moderate inconvenience and expense.

Qualifications

• You should possess a degree in Computer Engineering or Electrical Engineering with minimum 10+ years experience in product development and 4+ years of Engineering Management experience.

Additional qualifications include:

• Track record of leadership at Intel driving new cross-divisional initiatives.
• Excellent understanding of the Engineering Lifecycle and how security is a fundamental component.
• Excellent listening, written and verbal communication skills.
• Proven ability to manage and lead others to outstanding results.

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

Intel Platform Validation Engineering (PVE) is looking for an experienced silicon design architect to join our Validation Silicon Engineering (VSE) team. Primary duties include conducting and participating in multidisciplinary development, design, and validation of electronic components, IO, and/or circuitry. Ensures products and silicon designs conform to electrical and DFx specifications. Develops design specifications of circuits enabling analog and IO/interconnect validation. Initiates and provide technical guidance of iEV (integrated EV) designs, and development of new ideas and circuits. Collaborates with engineering within PVE and architecture/product/design teams, and drives DFx-iEV requirements, architecture, and implementation.

Successful candidate will demonstrate solid knowledge of IO design & architecture, post Si validation process, existing methodologies & debugging tools with the ability to innovate in these areas partnered with strong written, verbal communication, strong leadership and interpersonal skills with prior experience leading and influencing cross-functional engineering teams and customers.

Qualifications

Minimum Requirements:

• BS, MS, or PhD in Electrical Engineering with at least 14, 12, or 8 years experience, respectively.
• Capability to map and identify iEV needs to post-Si validation/PRQ methodologies of bus/IO initiatives and architectures
• Solid experience in analog/mixed-signal architecture, circuit design, implementation, and/or validation, implementing analog/mixed-signal designs with high degree of custom-circuit and digital content, such as DDR, PCIe, USB, SATA/SAS.
• Experience in architectural and system-level tradeoff analysis, including knowledge and use of Matlab, Simulink, etc.
• Experience in coding behavioral models of analog blocks using languages such as Verilog, System verilog, Verilog-A, Verilog-AMS.
• Experience with scripting tools, such as Perl, Python, Tcl/Tk, Unix/csh, and/or Skill.

Preference:

• Background in RTL design and modeling, including coding, formal verification, validation, and assertions.
• Background in software architecture and debugging/post-Si tools/instruments (logic analyzers, high-speed scopes, BERT, micro and/or pico probing, JTAG and others).
• Knowledgeable in DFX architecture.

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Description

In this position, you will be involved in both pre-silicon design and post-silicon validation work to deliver microprocessors. You will be part of Intel's Server Development Group's (SDG) processor development team.

Your responsibilities will include but not be limited to:

• Responsible for the design and implementation of circuits, blocks, and chip level integration to realize micro-architecture specifications
• Performing analysis and validation of designs via simulation methods such as static timing analysis, electrical robustness, electrical rule checking, noise analysis, reliability verification, and equivalence
• Responsible for the cooperation and collaboration with micro-architects to define realizable functional units
• Understanding of design environment, tools, capabilities, and scripts
• Testing, verifying and documenting your designs
• Responsible for the investigation, evaluation and recommendation for future designs and methodologies
• Providing definition and implementation of chip design, analysis tools and methodologies such as synthesis
• Have strong communication and teamwork skills and a self-starter with good initiative

Qualifications

Minimum Requirements:

• BS or MS degree in Electrical Engineering or Computer Science with 3-5 years experience
• In-depth knowledge of the electrical issues encountered in high frequency design
• Transistor (FET) level circuit or RLS synthesis experience
• Chip or block level design, floorplan, composition, and routing experience
• Timing, electrical and reliability analysis tools experience
• Strong scripting skills
• Good Digital Logic design knowledge
• Design, problem solving, and debug skills

Preferred:

• Experience with synthesis and auto-place and route tools and flows, mega-block methodologies or RTL coding

Intel Santa Clara Recruiting Open House
May 19, 2011 • 4:00 PM – 8:00 PM

Make a difference!
At JDSU, your talents can change the world.

JDSU is hosting an Open House
Date: Saturday, November 20th
Time: 1pm - 4pm
Location: JDSU, 460 McCarthy in Milpitas, CA.

We are hiring for Engineering and Production roles:
Make a difference!
At JDSU, your talents can change the world.

Wafer Fab Production Technicians
Wafer Fab Maintenance
Technicians
Wafer Fab Equipment Technicians
Wafer Fab Metrology Engineer
Engineering Technicians
Test Technicians
Manufacturing Process Engineer
Test Engineer
Reliability/Test Engineer
Product Engineer
VCSEL Device Engineer
Chip Product Engineer
Optical Engineer
Optical Alignment R&D Engineer
Optical Networks Engineer
Laser Reliability Engineer
Diode Laser chip designer
Transceiver Dev Engineer
Firmware Dev Engineer
Field Applications Engineer
SW Development Engineer/
Test Automation
Electrical Design Engineer
Mechanical Design Engineer
Product Line Manager
Engineering Project Manager
Receiver Design Proj Manager
Lean Projects Manager
Manager, Product Engineering
 

Positions include direct hire and temp opportunities.
To apply, please attend our Job Fair on Sat 11/20 from 1pm - 4pm.
Please bring 2 copies of your resume.
Learn more about jobs at JDSU at www.jdsu.com/careers

Sunnyvale, CA

Northrop Grumman Marine Systems is seeking a qualified Journeyman Level Machinist with experience in setting up and operating manual and CNC/DNC vertical and horizontal milling, grinding, drilling, broaching, boring, and turning machines to perform machining operations for various parts including complex configurations to exacting tolerances of finish, perpendicularity, concentricity, parallelism, and flatness, where details are not normally provided.

We are a manufacturer of critical, high-quality equipment for the United States Military. Excellent pay and benefits. U.S. Citizenship is required.

Achievement never ends.

For more information and to apply, please visit our website:
careers.northropgrumman.com

NORTHROP GRUMMAN

Northrop Grumman Corporation. Northrop Grumman is an Equal Opportunity Employer committed to hiring and retaining a diverse workforce regardless of age.
U.S. Citizenship is required for most positions.
 

Engineering

• Security Research Engineer, Sunnyvale, CA
• Software Engineer, Sunnyvale, CA
• Software Support Engineer, Sunnyvale, CA or New York, NY

Marketing

• Community Development Manager, Sunnyvale, CA

Operations

• Finance Manager, Sunnyvale, CA

Sales

• Sales Operations Assistant, Sunnyvale, CA

Services

• Applications Engineer, Sunnyvale CA
• Senior Applications Engineer, Sunnyvale CA